What is a flow?
In this blog, Chief Product Architect Alex Agerholm looks at the standard definition of network flows and explores the great potential that can be realized for lookup technology by seeing beyond conventional flow compositions.
Analytics in full flow
For efficiency, a lot of monitoring and analysis tools focus on flow records to detect anomalies in the network - and only dive to the underlying packet level if needed. In this blog, Chief Product Architect Alex Agerholm discusses typical use cases, looks at NetFlow/IPFIX acceleration and speculates on the imminent future of flow processing.
OVS mirror offload – monitoring without impacting performance
Following some recent work to run VXLAN using HW offload, the Napatech OVS offload initiative now explores another important feature: mirror offload. Learn how this enables monitoring without affecting performance of the overall system.
Light at the end of the tunnel – OVS offload shows 6x performance improvement
Lately, Napatech has been working on a full OVS offload implementation. See how we've achieved a 6x performance gain compared to a basic OVS+DPDK solution running on a standard NIC.
Going against the flow
CPU-bound security applications are severely challenged to process an ever increasing number of packets. In this blog, Chief Product Architect Alex Agerholm discusses how flow shunting can help address this performance bottleneck and explains how the next level of acceleration is achieved.
The road to FPGA-based reconfigurable computing
In his latest article, Claus Ek delves into his expertise on hardware to throw light on some of the requirements that need addressing to make a successful high-volume use case for FPGA-based reconfigurable computing platforms.
The three stages of reconfigurable computing – stage 3
The final in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
The three stages of reconfigurable computing – stage 2
The second in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
The three stages of reconfigurable computing – stage 1
The first in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
VPP – What performance to expect from a 2x100GbE NIC
VPP - Vector Packet Processing is a open-source project with high community activity. How does it perform running on Napatech NICs?