Reimagining NFV with Reconfigurable Computing
CIOReview: Napatech has developed an NFV SmartNIC solution that helps accelerate virtualization performance and flexibility in a cost-effective manner.
CIOReview: Napatech has developed an NFV SmartNIC solution that helps accelerate virtualization performance and flexibility in a cost-effective manner.
A PoC for Nokia delivered outstanding results, demonstrating 30x faster compression time and 40 Gbps sustained file compression for storage, using only 1 CPU core.
By Dan Joe Barry, Light Reading: The reconfigurability of FPGA-based solutions can help the NFV infrastructure to achieve the performance required, but in a way that can maintain transparency for the VNF and Orchestration layers.
Napatech SmartNIC solutions for accelerating virtual switching applications, such as Open Virtual Switch (OVS). A range of virtual switch solution options are available, designed to provide performance without compromising flexibility.
Napatech FPGA SmartNICs enable traffic replay up to 100G line rate for any packet size. This allows businesses to build reconfigurable testing platforms based on standard servers – creating a powerful, cost-effective and 100% reliable alternative to proprietary network test solutions.
Find out how TOYO overcame the challenge of delivering 100G replay, enabling their high-end customers to test infrastructures at ultra-high network speeds.
IBM successfully doubled performance of their QRadar Network Insights application without increasing the physical size of their solution.
VPP - Vector Packet Processing is a open-source project with high community activity. How does it perform running on Napatech NICs?
In this blog post Claus Ek focuses on the latest addition to the QSFPx form factor family - the QSFP-DD. The technological evolution usually enables a transition through the 3 tracks, as shown in the picture above, for a given link speed/type over a given period of time.